In recent years, for semiconductor devices, e.g. SRAM, it has been strongly demanded to increase in processing speed, and lower in power consumption. To cut down the power consumption of SRAM, it is the simplest and most efficient means to reduce the source voltage. However, a lower source voltage so arranged shrinks an operating margin necessary for a transistor operation, thereby leading to an unstable working. Japanese Unexamined Patent Application Publication JP-A-2007-035171 discloses a technique for measuring an operating margin of SRAM while changing the word-line pulse width.